I/O system organisation

Two methods for identifying I/O device identification, they are 8 bit address and 16 bit address identification. 8 bit address is used in peripheral mapped I/O  and 16 bit address is used in memory mapped I/O. In 8 bit address lines I/O read control signal is used for input devices and I/O write control signal used for output devices

Track ball is an input device, it works with the help of potentiometer. It is a 2 dimensional positioning device. Space ball is an input device, it have six degree of freedom. Unlike track balls space ball doesnot move. Space ball is 3 dimensional. Space ball work with strain gauge. Like track ball joy stick works with potentiometer. Data glove is an input device, based on electromagnetic couple

Digitiser is a drawing device, it is 2 dimensional and 3 dimensional device. One type of digitiser is graphics tablet/data tablet. Printers are of two types- impact printer and non impact printer. Line printer, dot matrix printer are examples of impact printer. Non impact printers and plotters use laser technique. Parallel printers use RS – 232C interface, centronics interface and handshake mode. Single BUS structure is used to connect I/O devices

advantage of I/O mapped devices to memory mapped is that devices have to deal with fewer address lines. To overcome the lag in the operating speeds of the I/O device and the processor we use Status flags. method of accessing the I/O devices by repeatedly checking the status flags is Program-controlled I/O

The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready is interrupts. The process where in the processor constantly checks the status flags is called as Polling. DMA (direct memory access) differs from the interrupt mode by the method of accessing I/O devices and amount of data transfer possible. DMA transfers are performed byDMA controller (it is like a processor in DMA transfer). After the completion of the DMA transfer the processor is notified by Interrupt signal. DMA controller has three registers, registers are 32 bits

When the R/W bit of the status register of the DMA controller is set to 1 read operation will be done . controller is connected to the system bus. DMA controller can perform operations on two different disks if the appropriate details are known. The technique in which DMA controller steals the access cycles of the processor to operate is called cycle stealing. In burst mode controller is given complete access to main memory

Controller uses Input Buffer storage to help with the transfers . To overcome the conflict over the possession of the BUS we use BUS arbitrators. DMA transfer is initiated by I/O devices. Device which is allowed to initiate data transfers on the BUS at any time is called BUS master. Open drain circuit is used for the bus request line

BUS busy line is made of open collector circuit. Centralised BUS arbitration is similar to daisy chain. When the processor receives the request from a device, it responds by sending BUS grant signal. Bus master decides the bus grand to I/O devices.

Distributed arbitration makes use 4 bit ID. In Distributed arbitration, the device requesting the BUS Asserts the Start arbitration signal. device selected in Distributed arbitration by ORing the signals passed on all the 4 lines. If two devices A and B contesting for the BUS have ID’s 5 and 6 respectively, based on the distribution arbitration device B get bus. Encoder generates ASCII code when a key is pressed. To overcome multiple signals being generated upon a single press of the button, we make use of debouncing circuit. output of the encoder circuit are ASCII code and the valid signal

In a 32 bit processor, the A0 bit of the address line is connected to Status or data register of the parallel port interface. DDR stands for,  Data Direction Register. The mode of transmission of data, where one bit is sent for each clock cycle is isochronous. Different clock signals for input and output are used to increase the flexibility of serial ports. UART is used to connect low speed devices. Data transfer in UART is done in Asynchronous start stop format. PCI stands for Peripheral Component Interconnect. PCI bus is an extension for the processor BUS. PCI bridge provides a separate physical connection to the memory

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For subject wise study materials :

Instrumentation

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Electrical

Basic electronics

Digital electronics

Microprocessor

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