Associated memory is content addressable memory (CAM), used to increase speed of memory access. Parallel access is possible in CAM, because of the locality of reference property of programs a large number of memory requests found in cache memory. Average time to reach a memory location of a memory and obtains its content is called access time. The time between the issue of read signal and the completion (MFC) of it is called memory access time.
MFC – memory function complete. minimum time delay between two successive memory read operations is Cycle time. processor can execute instructions faster than they’re fetched, hence cycle time is the bottleneck for performance. MMU stands for memory management unit, which is used to map logical address onto physical address. cells in a row are connected to a common line called word line. cells in each column are connected to sense/read line.
The word line is driven byaddress decoder, 16 X 8 organisation of memory cells, can store upto 128 bits (pure multiplication). Circuits that can hold their state as long as power is applied is static memory number of external connections required in 16 X 8 memory organisation is 14, because 16*8 = 2^4*8, 2 control signals, 4 address line and 8 data line. The physical memory is not as large as the address space spanned by the processor because of virtual memory. The program is divided into parts called as segments for ease of execution. techniques which move the program blocks to or from the physical memory is called as Paging , binary address issued to data or instructions is logical address.
MMU is used to implement virtual memory organisation. The virtual memory basically stores the next segment of data to be executed on the Secondary storage. The associativity mapped virtual memory makes use of translation lookaside buffer TLB, correspondence between the main memory blocks and those in the cache is given by Mapping function. The algorithm to remove and place new contents into the cache is called Replacement algorithm. write-through procedure is used to write directly on the memory and the cache simultaneously. Dirty bit is used to show that cache location is updated. approach where the memory contents are transfered directly to the processor from the memory is Early-start. In electromechanical devices access time is sum of seek time and transfer time. Auxillary storage or secondary storage is divided into records or blocks. Record/blocks consist of words.
Primary or main memory are R/W Memory or RAM, ROM. Static memory is made of flipflops (voltage). Dynamic memory is made of MOS transistors (charge). Advantages of dynamic memory are high density, low power consumption, cheaper than static. In Dynamic memory refreshing should be done in millisecond range
For using dynamic memory in a system, the memory should be atleast 8K, PROM has nichrome or polysilicon matrix,this will act as diodes or fuse. EPROM is semi permanent ROM, where stores a bit by charging the floating gate of an FET. EPROM can be reprogrammed by ultraviolet rays through quartz. EEPROM can be used in remote control applications. EPROM can erase fully , but EEPROM can be erased both fully or selectively. EEPROM is fully erased (in 10 ms) by chip erase mode, which is faster than (15 to 20 min in EPROM) EPROM erase
Accessing storage memory is semi automatic, If the gate of the transistor is closed then, the value of zero is stored in the ROM. difference between the EPROM and ROM circuitry is usage of extra transistor. EPROM chip is needed to remove the chip physically to reprogram it. EEPROM requires different voltages to read, write and store information memory devices which are similar to EEPROM but differ in the cost effectiveness is flash memory, flash is cheaper and bulk data cannot be stored. memory module obtained by placing a number of flash chips for higher memory storage is flash card flash memory modules designed to replace the functioning of an hard disk is flash drives. reason for the fast operating speeds of the flash drives is absence of any movable parts digital information is stored on the hard disk by applying electric pulse.
For the synchronization of the read head clock is used most widely used schemes of encoding Manchester read/write heads must be near to disk surfaces for better storage. A hard disk with 20 surfaces will have 20 heads. The set of corresponding tracks on all surfaces of a stack of disks form a cylinder . The read and write operations usually start at boundaries of the sector. To distinguish between two sectors we make use of Inter sector gap
Formating process divides the disk into sectors and tracks. The disk drive is connected to the system by using the SCSI bus. ECC (error correcting code) is used to detect and correct the errors that may occur during data transfers
Reason for the disregarding of the SRAM’s is high cost. processor must take into account the delay in accessing the memory location, such memories are called Asynchronous memories. To get the row address of the required data RAS is enabled. In order to read multiple bytes of a row at the same time, we make use of Latch. The block transfer capability of the DRAM is fast page mode. SDRAM (static dynamic ram) uses buffered storage of address and data. mode register is used to choose between burst mode or bit mode of operation. SDRAM each row is refreshed every 64ms
The time taken to transfer a word of data to or from the memory is called as memory latency . SDRAM performs operation on the Rising edge of the clock. DDR SDRAM’s perform faster data transfer by Transferring on both edges. To improve the data retrieval rate memory is divided into two banks. The chip gets enabled if the CS (chip select) is set otherwise the chip gets disabled. To organise large memory chips we make use of Memory modules. SIMM (single inline memory module) or DIMM (dual inline memory module) occupy less space while providing greater memory space.
The SRAM’s are basically used as Caches. The higher order bits of the address are used to Specify the row address . The address lines multiplexing is done by using Memory controller unit. controller multiplexes the addresses after getting the Request signal. RAS and CAS signals are provided by the Memory controller
When DRAM’s are used to build a complex large memory, then the controller only provides the refresh counter. The memory blocks are mapped on to the cache with the help of Mapping functions. During a write operation if the required block is not present in the cache then write miss occurs. In Write through protocol the information is directly written into main memory. The only draw back of using the early start protocol is Complexity of circuit
In Direct mapping the consecutive memory blocks mapped to consecutive cache blocks. While using the direct mapping technique, in a 16 bit system the higher order 5 bits is used for tag, The tag field is used to check the presence of a memory block. In associative mapping, in a 16 bit system the tag field has 12 bits. The associative mapping is costlier than direct mapping
The technique of searching for a block by going through all the tags is Associative search. The set associative map technique is a combination of the direct and associative technique. In set-associative technique, the blocks are grouped into 6 sets. A valid bit has to be provided to each block in set-associative, valid bit is used to indicate that the block holds valid information. The dirty bit is used to show that the block was recently modified, data which is not up-to date is Stale data
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